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<div class="header">
  <div class="headertitle"><div class="title">SYSCFG_TypeDef Struct Reference<div class="ingroups"><a class="el" href="group___c_m_s_i_s___device.html">CMSIS_Device</a> &raquo; <a class="el" href="group__stm32h723xx.html">Stm32h723xx</a> &raquo; <a class="el" href="group___peripheral__registers__structures.html">Peripheral_registers_structures</a></div></div></div>
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<p>System configuration controller.  
 <a href="#details">More...</a></p>

<p><code>#include &lt;<a class="el" href="stm32h723xx_8h_source.html">stm32h723xx.h</a>&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-pub-attribs" class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:ac0fd2e8e795e3cb9afe885963de90cd7" id="r_ac0fd2e8e795e3cb9afe885963de90cd7"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ac0fd2e8e795e3cb9afe885963de90cd7">RESERVED1</a></td></tr>
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<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>System configuration controller. </p>
</div><a name="doc-variable-members" id="doc-variable-members"></a><h2 id="header-doc-variable-members" class="groupheader">Member Data Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ae6ca0c33258c7876f958170ef0ae5c78">&#9670;&#160;</a></span>ADC2ALT</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t SYSCFG_TypeDef::ADC2ALT</td>
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<p>ADC2 internal input alternate connection register, Address offset: 0x30 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a916b26f435ff938144e0e74d1e4b68b3">&#9670;&#160;</a></span>CCCR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t SYSCFG_TypeDef::CCCR</td>
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<p>SYSCFG compensation cell code register, Address offset: 0x28 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a4b72e8104e124ffe7da8f6b1e42ff1e5">&#9670;&#160;</a></span>CCCSR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t SYSCFG_TypeDef::CCCSR</td>
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<p>SYSCFG compensation cell control/status register, Address offset: 0x20 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a4e4ef9c45d95b95d5ea7fa166ed6c88c">&#9670;&#160;</a></span>CCVR</h2>

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<p>SYSCFG compensation cell value register, Address offset: 0x24 </p>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t SYSCFG_TypeDef::CFGR</td>
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<p>SYSCFG configuration registers, Address offset: 0x18 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a66a06b3aab7ff5c8fa342f7c1994bf7d">&#9670;&#160;</a></span>EXTICR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t SYSCFG_TypeDef::EXTICR[4]</td>
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<p>SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#aff4d5fcad23e79b63fb8068a91f9bc4c">&#9670;&#160;</a></span>PKGR</h2>

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<p>SYSCFG package register, Address offset: 0x124 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#acdad8a8f75b45514bf1af615401d6ab6">&#9670;&#160;</a></span>PMCR</h2>

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<p>SYSCFG peripheral mode configuration register, Address offset: 0x04 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ac0fd2e8e795e3cb9afe885963de90cd7">&#9670;&#160;</a></span>RESERVED1</h2>

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<p>Reserved, Address offset: 0x00 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a0f4fb119d6edb48325e468aa3e67877d">&#9670;&#160;</a></span>RESERVED2</h2>

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<p>Reserved, Address offset: 0x1C </p>

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<p>Reserved, Address offset: 0x2C </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a7795b5064af95f77d08f0627c34e56c8">&#9670;&#160;</a></span>RESERVED4</h2>

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<p>Reserved, 0x34-0x120 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a597e8bd933a414d61cb04f2cfd314e07">&#9670;&#160;</a></span>RESERVED5</h2>

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<p>Reserved, 0x128-0x2FC </p>

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<p>Reserved, Address offset: 0x320-0x328 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a9ca884c93311fda6fd1d01aba5cce5b4">&#9670;&#160;</a></span>UR0</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t SYSCFG_TypeDef::UR0</td>
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<p>SYSCFG user register 0, Address offset: 0x300 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#af13f7ea65596c9ca978f79539ac2dcc8">&#9670;&#160;</a></span>UR1</h2>

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<p>SYSCFG user register 1, Address offset: 0x304 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a1066546475801b382f820cdf1f65c046">&#9670;&#160;</a></span>UR11</h2>

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<p>SYSCFG user register 11, Address offset: 0x32C </p>

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<p>SYSCFG user register 12, Address offset: 0x330 </p>

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<p>SYSCFG user register 13, Address offset: 0x334 </p>

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<p>SYSCFG user register 14, Address offset: 0x338 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#afbd1460717aa8f92a0bb5f23603f06fb">&#9670;&#160;</a></span>UR15</h2>

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<p>SYSCFG user register 15, Address offset: 0x33C </p>

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<p>SYSCFG user register 16, Address offset: 0x340 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a8ac8f0c5cce83f1c93df9ffeae1df62c">&#9670;&#160;</a></span>UR17</h2>

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<p>SYSCFG user register 17, Address offset: 0x344 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a6a5652438a866e600fd992c4956b5811">&#9670;&#160;</a></span>UR18</h2>

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<p>SYSCFG user register 18, Address offset: 0x348 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a0710a4169dea79b2c284dead582c9db6">&#9670;&#160;</a></span>UR2</h2>

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<p>SYSCFG user register 2, Address offset: 0x308 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#aacb9659c156f6b7e5c59e1d999176b8d">&#9670;&#160;</a></span>UR3</h2>

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<p>SYSCFG user register 3, Address offset: 0x30C </p>

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<p>SYSCFG user register 4, Address offset: 0x310 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#afc7ca54e00e4d6b33f129ed99b76c70c">&#9670;&#160;</a></span>UR5</h2>

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<p>SYSCFG user register 5, Address offset: 0x314 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ad4475488878038fb4b425ee0f265c6d0">&#9670;&#160;</a></span>UR6</h2>

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<p>SYSCFG user register 6, Address offset: 0x318 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a3f2319525b1743d8f731bccd50b4ddf0">&#9670;&#160;</a></span>UR7</h2>

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<p>SYSCFG user register 7, Address offset: 0x31C </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/CMSIS/Device/ST/STM32H7xx/Include/<a class="el" href="stm32h723xx_8h_source.html">stm32h723xx.h</a></li>
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